Microkernel Performance Metrics
Traditionally, the performance metric people care most with microkernels is the basic IPC cost, i.e. the cost for sending a single, minimal-length message between two threads. While it can be debated how meaningful such a mikrobenchmark is, IPC is the most critical operation of a microkernel.
All figures shown here are measured under the following circumstances:
- hot cache (tight loop)
- one way (half of round-trip)
- inter address space (requiring a full switch of addressing context)
Data
Notes:
- NOVA does not support the standard GCC version of thread local storage (using segment registers). Instead it supports TLS via a general-purpose register (compiler options -ffixed-rbp and -ftls-model=global-dynamic). This reduces context-switch costs at the expense of slightly reduced application performance.
- The MIPS and Alpha figures published in HotOS'97 were for
incomplete kernel implementations. Actual costs for the fully functional kernels
were higher (100 cycles on MIPS and 70–80 cycles on
Alpha).
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