diff -crN pistachio-clean/kernel/config/alpha.cml pistachio/kernel/config/alpha.cml *** pistachio-clean/kernel/config/alpha.cml Thu Sep 25 05:04:23 2003 --- pistachio/kernel/config/alpha.cml Tue Dec 9 13:50:57 2003 *************** *** 43,48 **** --- 43,49 ---- PLAT_MULTIA 'Multia' PLAT_MIATA 'Miata' PLAT_TSUNAMI 'Tsunami' + PLAT_M5SIM 'M5 Simulator' # PLAT_SRM 'Generic' SPIN 'Spin on VGA' *************** *** 55,65 **** --- 56,68 ---- PLAT_MIATA PLAT_MULTIA PLAT_TSUNAMI + PLAT_M5SIM default PLAT_MIATA unless n suppress PLAT_MULTIA derive CPU_ALPHA_A21264 from PLAT_TSUNAMI derive CPU_ALPHA_A21164 from PLAT_MIATA + derive CPU_ALPHA_A21164 from PLAT_M5SIM derive CPU_ALPHA_A21064 from PLAT_MULTIA derive SWIZZLE_IO_ADDR from PLAT_TSUNAMI and ALPHA_ADDRESS_BITS == 43 diff -crN pistachio-clean/kernel/include/platform/m5sim/devspace.h pistachio/kernel/include/platform/m5sim/devspace.h *** pistachio-clean/kernel/include/platform/m5sim/devspace.h Thu Jan 1 10:00:00 1970 --- pistachio/kernel/include/platform/m5sim/devspace.h Tue Dec 9 14:48:00 2003 *************** *** 0 **** --- 1,142 ---- + /********************************************************************* + * + * Copyright (C) 2002-2003, University of New South Wales + * + * File path: platform/turbolaser/devspace.h + * Description: + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $Id: pistachio-m5.patch,v 1.1 2004/01/16 02:59:07 philipd Exp $ + * + ********************************************************************/ + + #ifndef __PLATFORM_DEVSPACE_H__ + #define __PLATFORM_DEVSPACE_H__ + + #include INC_ARCH(page.h) + + class devspace_t { + private: + /* Various PCI spaces */ + enum pci_space { + PCI_DENSE_OFFSET = (AS_KSEG_START + 0xc400000000ull), + PCI_SPARSE_OFFSET = (AS_KSEG_START + 0xc500000000ull), + PCI_IO_OFFSET = (AS_KSEG_START + 0xc600000000ull) + }; + + /* sjw (28/01/2003): Hopefully these will be optimised away */ + + /* we don't support tri-bytes, so don't ask. Will break for 64bit */ + __inline__ static word_t mk_cpu_addr(word_t space, word_t pci_addr, int nbytes) { + word_t size = ((nbytes - 1) & 0x3) << 3; + return space | (pci_addr << 5) | size; + } + + __inline__ static u8_t extbl(u32_t data, int offset) { + u8_t ret; + __asm__ ("extbl %2,%1,%0" : "=r"(ret) : "rI"(offset), "r"(data)); + return ret; + } + + __inline__ static u32_t insbl(u8_t data, int offset) { + u32_t ret; + __asm__ ("insbl %2,%1,%0" : "=r"(ret) : "rI"(offset), "r"(data)); + return ret; + } + + public: + __inline__ static void mb() { + __asm__ __volatile__("mb": : :"memory"); + } + + /* Reads a byte from PCI space */ + __inline__ static u8_t read8(word_t pci_addr) { + volatile u32_t *addr = + (volatile u32_t *) mk_cpu_addr(PCI_SPARSE_OFFSET, pci_addr, 1); + + mb(); + return extbl(*addr, pci_addr & 0x3); + } + + __inline__ static void write8(word_t pci_addr, u8_t data) { + volatile u32_t *addr = + (volatile u32_t *) mk_cpu_addr(PCI_SPARSE_OFFSET, pci_addr, 1); + + *addr = insbl(data, pci_addr & 0x3); + mb(); + } + + + __inline__ static u8_t dense_read8(word_t pci_addr) { + volatile u8_t *val = (volatile u8_t *) (PCI_DENSE_OFFSET + pci_addr); + + return *val; + } + + __inline__ static void dense_write8(word_t pci_addr, u8_t data) { + volatile u8_t *val = (volatile u8_t *) (PCI_DENSE_OFFSET + pci_addr); + + *val = data; + } + + /* Reads a quadword from PCI space */ + __inline__ static u8_t read64(u32_t pci_addr) { + volatile u64_t *addr = + (volatile u64_t *) mk_cpu_addr(PCI_SPARSE_OFFSET, pci_addr, 1); + + mb(); + return *addr; + } + + __inline__ static void write64(word_t pci_addr, u64_t data) { + volatile u32_t *addr = + (volatile u32_t *) mk_cpu_addr(PCI_SPARSE_OFFSET, pci_addr, 1); + + *addr = data; + mb(); + } + + /* sjw (28/01/2003): Is this correct? */ + /* ISA/IO-space compat. methods */ + __inline__ static u8_t inb(int port) { + volatile u32_t *addr = + (volatile u32_t *) mk_cpu_addr(PCI_IO_OFFSET, port, 1); + + mb(); + return extbl(*addr, port & 0x3); + } + + + /* sjw (28/01/2003): Is this correct? */ + /* ISA/IO-space compat. methods */ + __inline__ static void outb(int port, u8_t data) { + volatile u32_t *addr = + (volatile u32_t *) mk_cpu_addr(PCI_IO_OFFSET, port, 1); + + *addr = insbl(data, port & 0x3); + mb(); + } + }; + + + #endif /* __PLATFORM_DEVSPACE_H__ */ diff -crN pistachio-clean/kernel/include/platform/m5sim/intctrl.h pistachio/kernel/include/platform/m5sim/intctrl.h *** pistachio-clean/kernel/include/platform/m5sim/intctrl.h Thu Jan 1 10:00:00 1970 --- pistachio/kernel/include/platform/m5sim/intctrl.h Tue Dec 16 14:39:13 2003 *************** *** 0 **** --- 1,168 ---- + /********************************************************************* + * + * Copyright (C) 2002-2003, University of New South Wales + * + * File path: platform/m5sim/intctrl.h + * Description: Interrupt control for the M5 simulator + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $Id: pistachio-m5.patch,v 1.1 2004/01/16 02:59:07 philipd Exp $ + * + ********************************************************************/ + + /* + * M5 simulates a Turbolaser, but only well enough to run Tru64. For example, + * it currently hardcodes the SCSI and Ethernet interrupt vectors (which are + * also hardcoded below). This code might function on a real Turbolaser, but + * doesn't do everything it should - hence the platform named "m5sim" rather + * than "turbolaser". + */ + + #ifndef __PLATFORM__INTCTRL_H_ + #define __PLATFORM__INTCTRL_H_ + + #include INC_ARCH(intctrl.h) + + #define NUM_SPECIAL_IRQS 8 + #define NUM_DEVICE_IRQS 2 /* on a real TL this is *much* higher */ + #define NUM_IRQS (NUM_SPECIAL_IRQS + NUM_DEVICE_IRQS) + + #define BASE_SPECIAL_IRQ 0 + #define BASE_DEVICE_IRQ (BASE_SPECIAL_IRQ + NUM_SPECIAL_IRQS) + + #define MCHECK_IRQ 2 + #define PERF_IRQ 4 + #define CONSOLE_IRQ 5 + #define ENET_IRQ (0 + BASE_DEVICE_IRQ) /* Hardcoded for m5, not for a real TL */ + #define SCSI_IRQ (1 + BASE_DEVICE_IRQ) + + #define TLINTR_DUART0_ENA 0x01 + #define TLINTR_IPL14_ENA 0x02 + #define TLINTR_IPL15_ENA 0x04 + #define TLINTR_IPL16_ENA 0x08 + #define TLINTR_IPL17_ENA 0x10 + + #define TLCPU_BASE 0xfffffcff88000000 + #define TLCPU_INTRMASK0 (TLCPU_BASE + 0x1100) + #define TLCPU_INTRMASK1 (TLCPU_BASE + 0x1140) + + class intctrl_t : public alpha_intctrl_t { + private: + word_t cached_mask; + + // philipd (15/12/03): HACK because enet & scsi masked with the same bit + unsigned int masked_pci_irqs; + public: + word_t get_number_irqs(void) + { return NUM_IRQS; } + + bool is_irq_available(int irq) + { return irq < NUM_IRQS && (irq >= BASE_DEVICE_IRQ || irq == MCHECK_IRQ || irq == PERF_IRQ || irq == CONSOLE_IRQ); } + + void set_cpu(word_t irq, word_t cpu) {} + + word_t decode_irq(word_t irq) { + word_t ret = 0; + + if (irq == 0x820) { + ret = SCSI_IRQ; + } else if (irq == 0x830) { + ret = ENET_IRQ; + } else if (irq >= 0x680 && irq <= 0x6e0) { + ret = CONSOLE_IRQ; + } else { + printf("Got a weird device interrupt (vector 0x%lx)\n", irq); + enter_kdebug("Weird int"); + } + + return ret; + } + + void mask(word_t irq) { + volatile word_t* mask = (volatile word_t*) TLCPU_INTRMASK0; + + // philipd (16/12/03) XXX: console output causes mask() to be called + // before init_arch() is. So init here instead. + if (cached_mask == 0) { + cached_mask = (word_t)-1; + masked_pci_irqs = 0; + } + + if (irq == CONSOLE_IRQ) { + cached_mask &= ~TLINTR_DUART0_ENA; + } else if (irq == SCSI_IRQ || irq == ENET_IRQ) { + cached_mask &= ~TLINTR_IPL15_ENA; + masked_pci_irqs++; + ASSERT(masked_pci_irqs < 2); + } else { + /* special irq */ + return; + } + + *mask = cached_mask; + + printf("masked %d, new mask is %lx\n", (int)irq, (long int)cached_mask); + } + + bool unmask(word_t irq) { + volatile word_t* mask = (volatile word_t*) TLCPU_INTRMASK0; + + if (irq == CONSOLE_IRQ) { + cached_mask |= TLINTR_DUART0_ENA; + } else if (irq == SCSI_IRQ || irq == ENET_IRQ) { + ASSERT(masked_pci_irqs > 1); + cached_mask |= TLINTR_IPL15_ENA; + masked_pci_irqs--; + } else { + /* special irq */ + return false; + } + + *mask = cached_mask; + + printf("unmasked %d, new mask is %lx\n", (int)irq, (long int)cached_mask); + + return false; /* philipd: XXX hack */ + } + + void enable(word_t irq) { + unmask(irq); + } + + bool disable(word_t irq) { + mask(irq); + return false; + } + + void ack(word_t irq) { /* XXX do nothing */ } + + void init_arch() { /* XXX do nothing */ } + + void init_cpu() { /* XXX do nothing */ } + + void print_status(void) { /* XXX do nothing */ } + }; + + + + #endif /* __PLATFORM__INTCTRL_H__ */ diff -crN pistachio-clean/kernel/kdb/arch/alpha/console.cc pistachio/kernel/kdb/arch/alpha/console.cc *** pistachio-clean/kernel/kdb/arch/alpha/console.cc Tue Dec 16 16:46:09 2003 --- pistachio/kernel/kdb/arch/alpha/console.cc Tue Dec 16 16:42:09 2003 *************** *** 142,155 **** { long c; ! while ((c = getc_srm_nonblock()) < 0) ; return c; } static long cons_getenv(long index, char *envval, long maxlen) { long len = dispatch((word_t) CCB_GET_ENV, index, (word_t) envval, maxlen - 1, hwrpb_to_use); return len; } --- 142,158 ---- { long c; ! while ((c = getc_srm_nonblock()) <= 0) ; return c; } static long cons_getenv(long index, char *envval, long maxlen) { + // philipd XXX: m5 console uses FPU + PAL::wrfen(1); long len = dispatch((word_t) CCB_GET_ENV, index, (word_t) envval, maxlen - 1, hwrpb_to_use); + PAL::wrfen(0); return len; } *************** *** 165,171 **** } #endif ! #if defined(CONFIG_KDB_BREAKIN) void SECTION(".kdebug") kdebug_check_breakin(void) { switch(getc_srm_nonblock()) { --- 168,174 ---- } #endif ! #if defined(CONFIG_KDB_BREAKIN) && !defined(CONFIG_PLAT_M5SIM) void SECTION(".kdebug") kdebug_check_breakin(void) { switch(getc_srm_nonblock()) { *************** *** 188,194 **** hwrpb_to_use = INIT_HWRPB; if (cons_getenv(ENV_TTY_DEV, (char *) envval, sizeof(envval) * 8) < 0) { ! halt(); /* better than random crash */ } cons_dev = simple_strtoul((char *) envval, 0, 10); --- 191,200 ---- hwrpb_to_use = INIT_HWRPB; if (cons_getenv(ENV_TTY_DEV, (char *) envval, sizeof(envval) * 8) < 0) { ! // philipd XXX: m5 console doesn't understand ENV_TTY_DEV ! //halt(); /* better than random crash */ ! cons_dev = 0; ! return; } cons_dev = simple_strtoul((char *) envval, 0, 10); *************** *** 198,204 **** --- 204,212 ---- } word_t kdb_current_console = 0; + #ifndef CONFIG_PLAT_M5SIM kdb_console_t kdb_consoles[] = { { "SRM", &init_srm, &putc_srm, &getc_srm }, KDB_NULL_CONSOLE }; + #endif diff -crN pistachio-clean/kernel/kdb/platform/m5sim/Makeconf pistachio/kernel/kdb/platform/m5sim/Makeconf *** pistachio-clean/kernel/kdb/platform/m5sim/Makeconf Thu Jan 1 10:00:00 1970 --- pistachio/kernel/kdb/platform/m5sim/Makeconf Tue Dec 16 12:04:08 2003 *************** *** 0 **** --- 1,2 ---- + + SOURCES += ${addprefix kdb/platform/m5sim/,console.cc} diff -crN pistachio-clean/kernel/kdb/platform/m5sim/console.cc pistachio/kernel/kdb/platform/m5sim/console.cc *** pistachio-clean/kernel/kdb/platform/m5sim/console.cc Thu Jan 1 10:00:00 1970 --- pistachio/kernel/kdb/platform/m5sim/console.cc Tue Dec 16 16:36:41 2003 *************** *** 0 **** --- 1,114 ---- + /********************************************************************* + * + * Copyright (C) 2002-2003, University of New South Wales + * + * File path: kdb/platform/m5sim/console.cc + * Description: Console routines for M5 simulator + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $Id: pistachio-m5.patch,v 1.1 2004/01/16 02:59:07 philipd Exp $ + * + ********************************************************************/ + + #include + #include + #include + #include + + #include INC_ARCH(console.h) + #include INC_PLAT(devspace.h) + #include INC_GLUE(schedule.h) + #include INC_GLUE(intctrl.h) + #include INC_GLUE(config.h) + + /* M5 emulates a very simplified z8530 uart. This driver was written to talk to + * it. It probably won't work with a real z8530 */ + #define TL_UART_BASE 0xfffffcffa0000000 + #define TL_UART_STATUS (TL_UART_BASE + 0x80) + #define TL_UART_DATA (TL_UART_BASE + 0xc0) + #define TL_UART_TXACK (TL_UART_BASE + 0xc0) + + #define UART_STATUS_TX 0x2 + #define UART_STATUS_RX 0x1 + + #define BUFSIZE 256 + + void putc_turbolaser(char c) + { + volatile u32_t *data = (volatile u32_t *)TL_UART_DATA; + volatile u32_t *status = (volatile u32_t *)TL_UART_STATUS; + + while(*status & UART_STATUS_TX) + ; + *data = c; + if (c == '\n') + putc_turbolaser('\r'); + } + + long getc_turbolaser_nonblock(void) + { + volatile u32_t *data = (volatile u32_t *)TL_UART_DATA; + volatile u32_t *status = (volatile u32_t *)TL_UART_STATUS; + + if (*status & UART_STATUS_RX) { + return *data; + } + + return 0; + } + + char getc_turbolaser(void) + { + long c; + + while ((c = getc_turbolaser_nonblock()) <= 0) + ; + + return c; + } + + void init_turbolaser(void) + { + get_interrupt_ctrl()->mask(CONSOLE_IRQ); + } + + kdb_console_t kdb_consoles[] = { + { "TL UART", &init_turbolaser, &putc_turbolaser, &getc_turbolaser }, + KDB_NULL_CONSOLE + }; + + #if defined(CONFIG_KDB_BREAKIN) + void SECTION(".kdebug") kdebug_check_breakin(void) + { + long getc_turbolaser_nonblock(void); + switch(getc_turbolaser_nonblock()) { + case '\e': /* ESC*/ + enter_kdebug("KDB Breakin"); + return; + + default: + case -1: + return; + } + } + #endif diff -crN pistachio-clean/kernel/src/arch/alpha/console.cc pistachio/kernel/src/arch/alpha/console.cc *** pistachio-clean/kernel/src/arch/alpha/console.cc Thu Sep 25 05:05:25 2003 --- pistachio/kernel/src/arch/alpha/console.cc Tue Dec 9 14:23:33 2003 *************** *** 35,40 **** --- 35,41 ---- #include INC_ARCH(hwrpb.h) #include INC_ARCH(pgent.h) #include INC_ARCH(console.h) + #include INC_ARCH(pal.h) #define INIT_TEXT SECTION(".init.text") *************** *** 61,69 **** { struct vf_map *vf; word_t base_va = CONSOLE_AREA_START + ALPHA_PAGE_SIZE; ! /* Move HWRPB and CRB */ fixup(base_va, CONSOLE_AREA_START); /* Map HWRPB */ get_kernel_space()->add_mapping((addr_t) CONSOLE_AREA_START, (addr_t) INIT_HWRPB->rpb_phys, pgent_t::size_base, true, true); --- 62,73 ---- { struct vf_map *vf; word_t base_va = CONSOLE_AREA_START + ALPHA_PAGE_SIZE; ! ! /* philipd XXX: m5 console uses the FPU in fixup */ ! PAL::wrfen(1); /* Move HWRPB and CRB */ fixup(base_va, CONSOLE_AREA_START); + PAL::wrfen(0); /* Map HWRPB */ get_kernel_space()->add_mapping((addr_t) CONSOLE_AREA_START, (addr_t) INIT_HWRPB->rpb_phys, pgent_t::size_base, true, true); *************** *** 86,91 **** --- 90,100 ---- crb->crb_v_fixup = (struct crd *) ((word_t) crb->crb_p_fixup - vf->pa + vf->va); + #if CONFIG_PLAT_M5SIM + crb->crb_v_dispatch = (struct crd *) phys_to_virt(crb->crb_v_dispatch); + crb->crb_v_fixup = (struct crd *) phys_to_virt(crb->crb_v_fixup); + #endif + /* Update VPTB */ INIT_HWRPB->rpb_vptb = VLPT_AREA_START; update_hwrpb_checksum(INIT_HWRPB); diff -crN pistachio-clean/kernel/src/platform/m5sim/linker.lds pistachio/kernel/src/platform/m5sim/linker.lds *** pistachio-clean/kernel/src/platform/m5sim/linker.lds Thu Jan 1 10:00:00 1970 --- pistachio/kernel/src/platform/m5sim/linker.lds Tue Dec 9 15:24:26 2003 *************** *** 0 **** --- 1,2 ---- + + #include INC_ARCH(linker.lds) diff -crN pistachio-clean/user/contrib/elf-loader/Makefile.in pistachio/user/contrib/elf-loader/Makefile.in *** pistachio-clean/user/contrib/elf-loader/Makefile.in Thu Nov 27 12:27:48 2003 --- pistachio/user/contrib/elf-loader/Makefile.in Mon Jan 5 12:57:26 2004 *************** *** 109,116 **** .INTERMEDIATE: lds.tmp lds.tmp: $(LDS_$(ARCH)) ! # @$(CPP) $(PPFLAGS) -P -C $< -o $@ ! cp $< lds.tmp $(TARGET): $(MODULES) $(OBJS) lds.tmp @echo "Linking $(NAME) ($(TARGET))" --- 109,116 ---- .INTERMEDIATE: lds.tmp lds.tmp: $(LDS_$(ARCH)) ! @$(CPP) $(PPFLAGS) -I$(kerneldir)/config -P -C -x c $< -o $@ ! # cp $< lds.tmp $(TARGET): $(MODULES) $(OBJS) lds.tmp @echo "Linking $(NAME) ($(TARGET))" diff -crN pistachio-clean/user/contrib/elf-loader/platform/srm/console.cc pistachio/user/contrib/elf-loader/platform/srm/console.cc *** pistachio-clean/user/contrib/elf-loader/platform/srm/console.cc Thu May 1 03:20:17 2003 --- pistachio/user/contrib/elf-loader/platform/srm/console.cc Tue Dec 9 13:57:19 2003 *************** *** 123,129 **** hwrpb_to_use = INIT_HWRPB; if (cons_getenv(ENV_TTY_DEV, (char *) envval, sizeof(envval) * 8) < 0) { ! halt(); /* better than random crash */ } cons_dev = simple_strtoul((char *) envval, 0, 10); } --- 123,132 ---- hwrpb_to_use = INIT_HWRPB; if (cons_getenv(ENV_TTY_DEV, (char *) envval, sizeof(envval) * 8) < 0) { ! // philipd (09/12/03): m5 console doesn't understand ENV_TTY_DEV ! //halt(); /* better than random crash */ ! cons_dev = 0; ! return; } cons_dev = simple_strtoul((char *) envval, 0, 10); } diff -crN pistachio-clean/user/contrib/elf-loader/platform/srm/linker.lds pistachio/user/contrib/elf-loader/platform/srm/linker.lds *** pistachio-clean/user/contrib/elf-loader/platform/srm/linker.lds Thu May 1 03:20:17 2003 --- pistachio/user/contrib/elf-loader/platform/srm/linker.lds Mon Jan 5 12:57:35 2004 *************** *** 1,3 **** --- 1,5 ---- + #include + OUTPUT_FORMAT("elf64-alpha") OUTPUT_ARCH(alpha) ENTRY(_start) *************** *** 5,11 **** --- 7,17 ---- SECTIONS { /* Read-only sections, merged into text segment: */ + #ifdef CONFIG_PLAT_M5SIM + . = 0xfffffc0000200000; + #else . = 0x20000000; + #endif _text = .; .text : { *(.text.start)